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Compiler optimizations
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#	Item
31	ROSE Compiler Infrastructure Source-to-Source Analysis and Optimization Dan Quinlan Rich Vuduc, Qing Yi, Markus Schordan Add to Reading List Source URL: www.cs.rice.edu Language: English - Date: 2005-11-07 14:49:56 Software engineering Compiler optimizations Programming language theory Computer programming Compiler Loop fusion Loop optimization Program optimization Inline expansion ALGOL 68 Optimizing compiler Induction variable
32	Performance Portable Optimizations for Loops Containing Communication Operations Costin Iancu Wei Chen, Katherine Yelick Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-10-24 14:34:01 Computing Software engineering Compiler optimizations Computer programming Loop optimization Automatic parallelization Loop nest optimization CPU cache Program optimization Software pipelining Granularity Lookup table
33	This talk is divided into 7 parts. Part 1 begins with a quick look at the SSA optimization framework and global value numbering. Part 2 describes a well known brute force algorithm for GVN. Part 3 modiﬁes this to arriv Add to Reading List Source URL: www.sable.mcgill.ca Language: English - Date: 2009-03-09 09:18:56 Compiler optimizations Search algorithms Arrays Global value numbering Static single assignment form Hash function Hash table Algorithm Lookup table Congruence
34	Parallel Computing–248 www.elsevier.com/locate/parco A compiler tool to predict memory hierarchy performance of scientiﬁc codes q B.B. Fraguela a, R. Doallo Add to Reading List Source URL: www.des.udc.es Language: English - Date: 2004-03-17 11:53:46 Cache Compiler optimizations Computer memory Computer architecture Software optimization CPU cache Optimizing compiler Locality of reference Automatic parallelization Infinite loop Memory hierarchy Lookup table
35	Faster Fourier Transforms via Automatic Program Specialization Julia L. Lawall IRISA { Compose group Campus Universitaire de BeaulieuRennes Cedex, France Add to Reading List Source URL: repository.readscheme.org Language: English - Date: 2010-10-22 08:05:17 Digital signal processing Cache Computer memory Compiler optimizations Algorithms Divide and conquer algorithms Fast Fourier transform CPU cache Optimizing compiler Partial evaluation Speedup Template
36	i Jason W. Kim and Terrance E. Boult EECS Dept. Lehigh University Room 304 Packard Lab. 19 Memorial Dr. W. Bethlehem, PAUSA jwk2 tboult @eecs.lehigh.edu Add to Reading List Source URL: www.vast.uccs.edu Language: English - Date: 2003-12-24 21:58:15 Compiler optimizations Compiler construction Procedural programming languages Programming language implementation Subroutines Static single assignment form Global value numbering Optimizing compiler Constant folding Program optimization Inline expansion Compiler
37	Performance Portable Optimizations for Loops Containing Communication Operations Costin Iancu Wei Chen, Katherine Yelick Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-10-24 14:33:15 Compiler optimizations Loop optimization Automatic parallelization Loop nest optimization CPU cache Program optimization Software pipelining Lookup table Distributed computing Fortran Compiler Algorithm
38	A Fixed-Point Algorithm for Automated Static Detection of Infinite Loops Andreas Ibing, Alexandra Mai Chair for IT Security TU M¨unchen Boltzmannstrasse 3, 85748 Garching, Germany {ibing,mai}@sec.in.tum.de Add to Reading List Source URL: www.sec.in.tum.de Language: English - Date: 2016-02-01 08:36:29 Recursion Theoretical computer science Formal methods Compiler optimizations Infinite loop Satisfiability modulo theories Control flow For loop Algorithm Termination analysis Loop unrolling Satisfiability
39	Optimization of Sparse Matrix-Vector Multiplication on Emerging Multicore Platforms Samuel Williams∗†, Leonid Oliker∗, Richard Vuduc§, John Shalf∗, Katherine Yelick∗†, James Demmel† ∗ CRD/NERSC, Lawrenc Add to Reading List Source URL: crd.lbl.gov Language: English - Date: 2012-09-07 00:12:17 Computer memory Cache Computer architecture Compiler optimizations CPU cache Central processing unit Opteron Cell Sparse matrix-vector multiplication Loop nest optimization Multi-core processor Advanced Micro Devices
40	Microsoft PowerPoint - software-pipelining-powerpoint-2003.ppt [Compatibility Mode] Add to Reading List Source URL: mesl.ucsd.edu Language: English - Date: 2011-04-30 02:15:16 Compiler optimizations Software pipelining Optimizing compiler Dependence analysis Loop optimization Loop invariant Interpretation Program optimization Loop unswitching Polytope model Loop unrolling Loop interchange

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